• A Genetic Algorithms Approach to Modeling the Performance of Memory-bound Computations
  M. Tikir, L. Carrington, E. Strohmaier, A. Snavely
  to appear in SC07 (Proceedings of the International Conference for High Performance Computing, Networking, and Storage), November 2007, Reno
• Precise and Realistic Utility Functions for User-Centric Performance Analysis of Schedulers
  C.B. Lee and A. Snavely
  HPDC-16 (Proceedings of IEEE Symposium on High-Performance Distributed Computing), June 2007, Monterey
• What's working in HPC?
  N. Wolter, M. O. McCracken, A. Snavely, V. Basili, L. Hochstein, T. Nakamura
  Cyberinfrastructure Technology Watch Journal: Special Issue on High Productivity Computer Systems
  J. Dongarra Editor, Volume 2 Number 4. February 2007
• Metrics for Ranking the Performance of Supercomputers
  T. Chen, M. Gunn, B. Simon, L. Carrington, A. Snavely
  Cyberinfrastructure Technology Watch Journal: Special Issue on High Productivity Computer Systems
  J. Dongarra Editor, Volume 2 Number 4. February 2007
• The PMaC Binary Instrumentation Library for PowerPC
  M. Laurenzano, M. Tikir, L. Carrington, and A. Snavely
  Workshop on Instrumentation and Applications, held in conjunction with ASPLOS XII, October, 2006, San Jose.
• Measuring the Performance and Reliability of Production Computational Grids
  O. Khalili, J. He, C. Olschanowsky, A. Snavely, H, Casanova
  The 7th IEEE/ACM International Conference on Grid Computing, September 2006, Barcelona, Spain.
• Symbiotic Space-Sharing on SDSC's DataStar System
  J. Weinberg, A. Snavely
  12th Workshop on Job Scheduling Strategies for Parallel Processing In Conjunction with SIGMETRICS 2006, Saint-Malo, France.
• User-guided symbiotic spacesharing of real workloads
  J. Weinberg, A. Snavely
  ICS06 (The 20th ACM International Conference on Supercomputing) , June 2006, Cairns, Australia.
• On the User-Scheduler Dialogue: Studies of User-Provided Runtime Estimates and Utility Functions
  International Journal of High Performance Computing Applications, in press
  Cynthia Bailey Lee and Allan Snavely
  
• Path Grammar Guided Trace Compression and Trace Approximation
  X. Gao, A. Snavely, L. Carter
  HPDC-15 (The 15th IEEE International Symposium on High Performance Distributed Computing) , June 2006, Paris.
• A Case Study on Reconfigurable Computing Using HMMER on the Starbridge HC-62 Platform
  D. Tamjidi, S. Gidwani, A. Snavely
  2006 IEEE Computer Annual Symposium on VLSI (ISVLSI 2006), to appear March 2006, Karlsruhe, Germany.
• ALITER: An Asynchronous Lightweight Instrumentation Tool for Event Recording
  X. Gao, B. Simon, A. Snavely
  Workshop on Binary Instrumentation and Applications (held in conjunction with PACT2005) , September 2005, St. Louis
• Reducing Overheads for Acquiring Dynamic Traces
  X. Gao, M. Laurenzano, B. Simon, A. Snavely
  International Synposium on Workload Characterization (ISWC05), September 2005, Austin
• Low Cost Trace-driven Memory Simulation Using SimPoint
  M. Laurenzano, B. Simon, A. Snavely, M. Gunn
  Workshop on Binary Instrumentation and Applications (held in conjunction with PACT2005) , September 2005, St. Louis.
• Quantifying Locality In The Memory Access Patterns of HPC Applications
  J. Weinberg, M. O. MCracken, A. Snavely, E. Strohmaier
  SC|05 , November 2005, Seattle.
• How well can simple metrics represent the performance of HPC applications?
  L. Carrington, M. Laurenzano, A. Snavely, R. Campbell, L. Davis
  SC|05 , November 2005, Seattle.
• Performance Sensitivity Studies for Strategic Applications
  L. Carrington, X. Gao, N. Wolter, A. Snavely, and R. Campbell
  UGC 2005 , June 2005, Nashville.
• Performance Modeling: Understanding the Present and Predicting the Future
  D.H. Bailey and A. Snavely
  EuroPar 2005 , September 2005, Lisbon.
• EMPS: An Environment for Memory Performance Studies
  J. K. Hollingsworth, A. Snavely S. Sbaraglia, K. Ekanadham
  NSF Next Generation Software Program Workship (held in conjunction with IPDPS), April 2005, Denver, CO.
• Applying an Automated Framework to Produce Accurate Blind Performance Predictions of Full-Scale HPC Applications
  Laura Carrington, Nicole Wolter, Allan Snavely, and Cynthia Bailey Lee
  UGC 2004, Williamsburgh, June 2004.
• Are user runtime estimates inherently inaccurate?
  C. B. Lee, Y. Schwartzman, J. Hardy, A. Snavely
  Workshop on Job Scheduling Strategies for Parallel Processing, in conjunction with SIGMETRICS, New York, June 2004.
• Benchmark Probes for Grid Assessment
  G. Chun, H. Dail, H. Casanova, A. Snavely
  High-Performance Grid Computing Workshop, IPDPS, Santa Fe, NM, April 2004.
• Performance Modeling of HPC Applications
  Allan Snavely, Xiaofeng Gao, Cynthia Lee, Nicole Wolter, Jesus Labarta, Judit Gimenez, Philip Jones
  ParCo, October, 2003, Dresden.
• Benchmarks for Grid computing: A Review of Ongoing Efforts and Future Directions
  Allan Snavely, Greg Chun, Henri Casanova, Rob Van der Wijngaart, Michael Frumkin
  SIGMETRICS Performance Evaluation Review (PER), Vol. 30, No. 4, March 2003.
• Exploiting Stability to Reduce Time-Space Cost for Memory Tracing
  Xiaofeng Gao and Allan Snavely
  ICCS Workshop on Performance Modeling and Analysis (PMA03), June 2003, Melbourne
• A Performance Prediction Framework for Scientific Applications
  Laura Carrington, Allan Snavely, Xiaofeng Gao, and Nicole Wolter
  ICCS Workshop on Performance Modeling and Analysis (PMA03), June 2003, Melbourne
• A Framework for Application Performance Modeling and Prediction
  Allan Snavely, Laura Carrington, Nicole Wolter, Jesus Labarta, Rosa Badia, Avi Purkayastha
  SC2002, Baltimore
• A Framework for Application Performance Prediction to Enable Scalability Understanding
  Laura Carrington, Nicole Wolter, and Allan Snavely
  Scaling to New Heights Workshop, May 2002, Pittsburgh
• Symbiotic Jobscheduling with Priorities for a Simultaneous Multithreading Processor
  Allan Snavely, Dean Tullsen, and Geoff Voelker (UCSD)
  SIGMETRICS, 2002, to appear
• Modeling Application Performance by Convolving Machine Signatures with Application Profiles
  Allan Snavely, Laura Carrington, and Nicole Wolter (UCSD)
  IEEE Workshop on Workload Characterization, December 2001, Austin
• Symbiotic Jobscheduling for a Simultaneous Multithreading Machine
  Allan Snavely and Dean Tullsen (UCSD)
  ASPLOS IX, November 2000, Boston
• Symbiotic Jobscheduling for Hardware Multithreaded Machines
  Allan Snavely (UCSD)
  Ph.D. Thesis, August 2000, San Diego
• Symbiotic Jobscheduling on the MTA.
  Allan Snavely and Larry Carter (UCSD)
  Workshop on Multi-Threaded Execution, Architecture, and Compilers, January 2000, Toulouse
• Evaluation of a Multithreaded Architecture for Defense Applications.
  Wayne Pfeiffer, Larry Carter, Allan Snavely et. al.
  SDSC Technical Report
• Data Intensive Volume Visualization on the Tera MTA and Cray T3E
  Allan Snavely, Greg Johnson and Jon Genetti (SDSC)
  Advanced Simulation Technologies Conference, April 1999, San Diego
• Performance and Programming Experience on the Tera MTA
  Larry Carter (SDSC/UCSD), John Feo (Tera) and Allan Snavely (SDSC/UCSD)
  SIAM, March 1999, San Antonio
• Explorations in Symbiosis on two Multithreaded Architectures
  Allan Snavely (UCSD), Nick Mitchell (UCSD), Larry Carter and Jeanne Ferrante (UCSD), Dean Tullsen (UCSD)
  M-TEAC, January 1999, Orlando
• Multi-processor Performance on the Tera MTA
  Allan Snavely and Larry Carter (SDSC/UCSD), Jay Boisseau and Amit Majumdar (SDSC), Kang Su Gatlin and Nick Mitchell (UCSD), John Feo and Brian Koblenz (Tera Computer)
  SC 98, November 1998, Orlando
• CRAY T90 vs. Tera MTA: The Old Champ Faces a New Challenger
  Jay Boisseau, Larry Carter and Allan Snavely with David Callahan, John Feo, Simon Kahan and Zhijun Wu of Tera
  Cray User's Group Conference, June 1998, Stuttgart
• NAS Benchmarks on the Tera MTA
  Jay Boisseau, Larry Carter, Kang Su Gatlin, Amit Majumdar, and Allan Snavely
  Workshop on Multi-Threaded Execution, Architecture, and Compilers, January 1998, Las Vegas

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