CSE 141L Lab Assignments

Spring 2004, Instructor: Allan Snavely

Lab Assignments:

Lab 1:  8-bit Instruction Set Architecture.  Due April 16th.

Lab 2:  8-bit ALU.  Due May 3rd. Here are the sample schematic and timing diagram referenced in the lab 2 description.

Lab 3:  8-bit CPU.  Due May 24th.

Lab 4:  Cache Simulator .  Due Sunday June 6th.

Memory tutorial:  click here


If you have comments or suggestions, email me at allans@sdsc.edu