Reading and Homework Assignments:
R #1 -- H&P chapters 1,2, and 3
HW #1 -- Due Thursday, April 8th.
H&P 3.2, 3.5, 3.7, 3.9, 3.10, 3.14, 3.19, 3.29
R #2 -- H&P chapter 4
HW #2 -- Due Thursday, April 15th
H&P 2.1, 2.3, 2.9, 2.11, 2.18, 2.22, 2.23, 2.31, 2.32, 4.2, 4.9, 4.14, 4.17, 4.21, 4.23
R #3 -- H&P chapter 5 through 5.3
HW #3 -- Due Thursday, May 6th
H&P 5.1, 5.5, 5.6, 5.9, 5.11, 5.14(b)
H&P 5.17, 5.21, 5.22
H&P 6.1, 6.4, 6.8 (see below), 6.9, 6.11, 6.13 , P9, and WS#1.HW #5
P9: Draw the pipeline diagram (see below) for the following code, showing all forwarding and bubbles:lw $6, 4000($7)For problems 6.8 and P9, draw a pipeline diagram similar to that shown in the "data hazards" lecture slide #23 (doesn't have to be so fancy), or similar to what I did for slide #24.
add $9, $6, $3
or $2, $9, $6
lw $2, 2000($2)
add $3, $9, $2
sw $9, 2000($3)WS(Web Surf) #1: How many pipeline stages do the following processors have?:
- Intel Pentium Pro/II/III (all based on the P6 architecture -- so they'll all have the same number)
- Compaq/DEC Alpha 21264
- MIPS R10000
- Intel Itanium (first IA-64 processor)
P1, P2, H&P 7.2, 7.3, 7.7 (see below), 7.8(see below), WS#2.WS(Web Surf) #2: What is the superscalar width of the following processors (that is, what is the maximum number of instructions per cycle that they can sustain)?:
P1: Assuming this loop is taken many times, what is the steady-state CPI of this loop on the scalar pipeline discussed in class, with forwarding, branch resolution done in the ID stage, and no branch delay slot?loop:lw $6, 4000($7)
add $9, $6, $3
or $5, $9, $6
lw $2, 2000($5)
add $3, $9, $2
subi $5, $5, 12
sw $9, 2000($3)
bne $9, $0, loop
P2: Now assuming the same machine but with a branch delay slot, rearrange this code to improve performance, and give me the new CPI.
For problems 7.7 and 7.8, the book's use of word addresses can be confusing. Please multiply all the addresses by 4, and treat them as byte addresses (this makes it the exact same problem, and is now consistent with real machines, and what we did in class).
- Intel Pentium III
- Compaq/DEC Alpha 21264
- MIPS R10000
HW #6
H&P 7.14, 7.15, 7.17, 7.19, 7.20, 7.23, 7.24, 7.28, 7.29, 7.32, 7.33, 7.34All the interesting problems in the book (includes a bunch you've already done):