CFP: Workshop on Performance Modeling - ICCS Melbourne 6/2/03

Dear Colleague,

You are invited to submit a workshop paper in the general topic area of HPC performance benchmarking, modeling, and extrapolation. The workshop will take place in Melbourne Australia June 2nd (see http://www.science.uva.nl/events/ICCS2003/ for general conference information).

Preference will be given to papers with innovative and creative ideas for dealing with the challenges inherent in evaluating current HPC systems, and/or designing future ones guided by desires of the users and computational demands of scientific applications. The workshop emphasis is towards creativity and thinking "out-of-the-box". We encourage submissions with partial research results and promising lines of investigation even if these have not yet been thoroughly developed.

SUBMISSION INSTRUCTIONS AND DEADLINES:

Please submit draft papers for consideration by January 15th, 2003 in either .ps, .pdf, or MS Word format via email to
allans@sdsc.edu

Notification of acceptance February 1st.

Final versions due February 15th. Papers longer than 10 pages are not encouraged but not specifically prohibited (you may be asked to trim the final version).

TITLE:

Benchmarking, Performance Evaluation, and Performance Modeling

CHAIRS:

Allan Snavely, SDSC
Jeff Vetter, LLNL

DESCRIPTION:

This workshop will explore performance evaluation of HPC systems and Grids with an emphasis on high order performance objective functions. For example, while common wisdom has held that "you can't benchmark user satisfaction" several interesting recent works exhibit the contrary. It may be possible to design, build, and schedule systems in ways that explicitly optimize for user's applications and the values they attach to timely results. And it may be possible to do this in a fully quantitative and objective way.

Specific areas of interest include (but are not limited to)

  • Correlating low-level benchmarks to real applications performance
  • Methods and uses for "application signatures" (abstract characterizations of the computational demands of HPC applications)
  • Performance Modeling including:
    - Designing systems to best support particular algorithm/application families
    - Innovative approaches to extrapolating the expected performance of future machines
    - Methods for picking the right machine for an application
  • Full systems benchmarking including:
    - Benchmarking scheduler software and other HPC and Grid middleware
    - I/O subsystem benchmarking
    - Methods for "benchmarking" the users to ascertain their utility functions

    CHAIR CONTACT INFO:

    Allan Snavely, Ph.D.
    PMaC Laboratory Leader
    Integrative Computational Sciences
    SDSC University of California, San Diego
    10100 Hopkins Drive, La Jolla
    E-mail: allans@sdsc.edu
    Phone: (858) 534-5158
    Fax: (858) 534-5117
    http://www.sdsc.edu/~allans
    http://www.sdsc.edu/PMaC

    Jeffrey Vetter, Ph.D.
    Center for Applied Scientific Computing
    Lawrence Livermore National Laboratory
    Box 808, L-560
    Livermore, CA 94551
    vetter3@llnl.gov
    Phone: (925) 424-6284
    Fax: (925) 422-6287