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Michael McCracken and Xiaofeng Gao
Department of Computer Science
University of California San Diego
http://www.cs.ucsd.edu/~mmccrack http//www.cs.ucsd.edu/users/xgao
The Cray X1 Architecture
This past November, Cray announced the X1, a vector supercomputer that incorporates many interesting new ideas, as the response to NEC SX6.
We have been very interested in this new architecture and have spent some time to gather information about it. In this talk, we will share
what we have learned about this machine.
We will discuss the current status and future plans for the Cray X1,including how Cray plans to achieve petaflops performance by 2008
using the X1 architecture. We will introduce the basic architecture designs and discuss software currently available, along with some
plans for future software support. More interestingly, we will present performance data measured for various subsystems, including the
floating point unit, memory system, and communication system. We will also show comparisons of the Cray X1, IBM SP, and NEC SX6 on
various benchmarks to highlight the effects of architecture difference on performance.
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